Silicon carbide (SiC) has excellent properties for fabrication of power semiconductor devices. SiC has due to its wide bandgap nearly ten times higher critical field strength than silicon and the wide bandgap also provides the possibility for devices that can operate at high temperatures. The thermal conductivity of SiC is also 2-3 times higher than for Si and this improved heat transport means that SiC devices can operate at higher power densities without being overheated.
Power switching transistors and diodes are used in a wide variety of power electronic systems such as power supplies, motor drives, welding, electric vehicles, trains and transmission and distribution of electric power on the grid
It is important to reduce power losses in power transistors and diodes as much as possible, since the power losses are wasted energy and because they limit the minimum size of the power electronic system. Today, power transistors in silicon (Si) such as MOSFETs and Insulated Gate Bipolar Transistors (IGBTs) are dominant in power electronics. The minimum power losses of these Si devices are, however, limited by the thick lowly doped drift region that is necessary to ensure high voltage blocking capability. The thick drift region adds to the on-state resistance of the devices thus increasing the power losses during conduction and in bipolar Si devices there is a significant stored charge that causes slower switching and increased switching power losses. The fundamental material properties of Si are a barrier to substantial reductions of the power losses, that become more and more limiting for the continuous downscaling of power electronic systems. Another more promising way to reduce the power losses is to develop power devices in a new material with wider bandgap.
Silicon carbide (SiC) is the most mature of the wide bandgap semiconductors. High-quality wafers in SiC are available, and thermal SiO2 can be grown to fabricate SiC MOSFET transistors and high-quality surface passivation. SiC has about ten times higher critical field strength than Si and this means that the drift layer can be made much thinner and with a higher doping concentration. SiC devices have therefore a much lower on-state resistance than Si devices which means lower conduction power losses, and SiC devices have less stored charge which means reduced switching power losses compared to Si bipolar devices like IGBTs.
SiC pn diodes have the disadvantage that a forward voltage of close to 3 V has to be applied to give forward conduction and this means relatively high conduction power losses for pn diodes with moderate breakdown voltages. SiC pn diodes are therefore competitive mainly in applications where breakdown voltages exceeding about 2 kV are required.
SiC bipolar junction transistors (BJTs), on the other hand, are attractive also for lower breakdown voltages because the base-emitter voltage and the base-collector voltage nearly cancel each other, and due to this junction cancellation, the forward voltage and the conduction power losses can become very low. Since the voltage blocking enabling drift region (the collector) of SiC BJTs is much thinner than for a Si bipolar device, there is also much less stored charge and the switching is faster resulting in lower switching power losses.
Bipolar junction transistors (BJTs) are well known and they are used in high frequency and in power electronics applications. BJTs have two pn junctions in close proximity to each other. A region called the collector has a junction to a region called the base and the base has a junction to a region called the emitter. The collector and emitter regions have dopings of the same type, either n-type or p-type. The base region has a doping of the opposite type as the collector and emitter. The most commonly used bipolar transistor, referred to as npn bipolar junction transistor, has emitter and collector regions with n-type doping and a base region with p-type doping.
The emitter, base and collector have separate metal contacts that can be biased with respect to each other. If the base-emitter voltage is less than the built-in potential of the base-emitter junction, then the BJT is in its off-state. In the off-state, the BJT can block a high positive voltage applied between the collector and the emitter. The blocking capability is limited by avalanche breakdown of the base-collector junction if the base is designed with a doping dose high enough to avoid punch-through at voltages below the avalanche breakdown voltage. The avalanche breakdown voltage is limited by the doping and thickness of the collector region which constitutes the drift region in the BJT.
If the base-emitter voltage is about equal to, or larger than, the built-in potential of the base-emitter junction then the BJT is in its on-state. In the on-state, electrons are injected from the emitter to the base and, provided that the base is thin enough and the carrier lifetime is sufficiently high, most electrons diffuse through the base without recombining and reach the collector, thus causing a collector current. The emitter is doped with a higher concentration of n-type dopants than the concentration of p-type dopants in the base, in order to achieve high emitter injection efficiency, which means that the current at the base-emitter junction is dominated by electrons.
The collector current IC in the BJT, in the on-state, consists mainly of electrons that are injected from the emitter and diffuse through the base. IC is therefore controlled by the base current IB and IC is equal to the current gain β times IB. A high current gain is desired for a power BJT to be able to keep the BJT in its on-state with as low base current as possible, to simplify the drive circuit requirements.
Power switching BJTs have typically a vertical topology as shown schematically in FIG. 1. The n-type doped drift region (often referred to as collector), which has a doping and thickness chosen to achieve the desired breakdown voltage, is placed on top of a substrate which has a high n-type doping to minimize the series resistance and to simplify fabrication of the collector ohmic contact.
A base layer with p-type doping is located on top of the collector and an n-doped emitter region on top of the base region. The base and collector regions can be laterally confined after fabrication by local diffusion or ion implantation (see FIG. 1a), or the base and emitter regions can be placed vertically on top of the collector region with junction termination by local etching of the semiconductor (see FIG. 1b).
SiC bipolar junction transistors (BJTs) are well known. See for example:
Münch et al., “Silicon Carbide Bipolar Transistor”, Solid-State Electronics, Vol. 21, pp. 479-480, (1978)
Luo et al., “Demonstration of 4H-SiC Power Bipolar Junction Transistors”, Electronic Letters, Vol. 36, No. 17, (2000)
Ryu et al., “1800 V, 3.8 A bipolar junction transistors in 4H-SiC”, Proceedings of the 58th Device Research Conference (DRC), p. 133, (2000)
The vertical BJT structure shown in FIG. 1b is most commonly used for SiC BJTs since diffusion of dopants cannot be used, and ion implantation has been found to create current gain degrading defects if it is performed in the active region of the bipolar junction transistor.
One crucial aspect in fabrication of SiC BJTs is the need to form a highly doped p-type region locally under the base contact. The highly doped p-type region can be formed in two ways:                1) By ion implantation of p-type dopants as described in U.S. Pat. No. 4,945,394. Ion implantation of p-type dopants, such as aluminum is well known for forming p-doped regions in SiC pn diodes, see for example: Vodakov et al., “Electrical properties of p-n-n+ structure formed in silicon carbide by implantation of aluminum ions”, Soviet Physics—Semiconductors, Vol 21, No. 9, p. 1017, (1987)        2) By epitaxial regrowth of a highly doped p-type region and subsequent etching as described in U.S. Pat. Nos. 6,815,304 and 6,982,440 and in Danielsson et al., “Extrinsic base design of SiC bipolar transistors”, Materials Science Forum, Vols. 457-460, p. 1117, (2004)        
SiC BJTs have been experimentally shown to have very low on-state voltages and therefore conduction power loss that are significantly lower than Si IGBTs and Si MOSFETs for a transistor with a breakdown voltage of 1000 V [Krishnaswami et al., “1000-V 30-A 4H-SiC BJTs with high current gain”, IEEE Electron Device Letters, Vol. 26, No. 3, p. 175, (2005)]. SiC BJTs have also been shown to have a forward voltage with a positive temperature coefficient and a current gain with a negative temperature coefficient. Both temperature dependencies are important to facilitate a safe parallel connection of SiC BJTs and thereby successful application in power modules that consist of several transistor chips connected in parallel.
For successful application of power switching SiC BJTs, a relatively high current gain exceeding 50 is probably required, and a wide safe operating area must be proved.
SiC pn diodes are known, and high voltage blocking capability has been shown experimentally [Lendenmann et al., “Long term operation of 4.5 kV PIN and 2.5 kV JBS diodes”, Materials Science Forum, Vols. 353-356, p. 727, (2001)]. SiC pn diodes have a lowly n-doped region called drift layer on top of the n-doped substrate. The drift layer is designed with sufficiently low doping and sufficient thickness to obtain a high breakdown voltage.
A p doped region can either be placed on top of the drift layer or be laterally confined after fabrication by local diffusion or ion implantation. Both types of SiC pn diodes are shown in FIG. 2. Metal is deposited, patterned and etched to form an anode contact to the p-type region and a cathode contact to the n-doped substrate.
Both for the SiC BJT and for the SiC pn diode a wide safe operating area is required. In the following sections, it is described how the present invention provides a wider safe operating area for SiC semiconductor devices. The above described SiC BJTs and SiC pn diodes are two preferred embodiments of the invention, in which the benefits of the invention are substantial.
The so-called buffer layers according to prior art has traditionally been used to prevent the electric field from reaching the p layer in a so-called punch-through IGBT and at the same time reduce the injection of holes from the p layer [Nakagawa et. al., 600- and 1200-V Bipolar-Mode MOSFET's with High Current Capability”, IEEE Electron Device Letters, Vol. EDI-6, No. 7, p. 378, (1985)].
A silicon carbide diode can have a traditional buffer layer with a doping concentration in the range of one to two orders of magnitude higher than the doping concentration of the drift region. We assume the lowest buffer layer doping, i.e. ten times higher than the doping of the drift region. If the diode is made with a conventional punch-through design that minimizes its unipolar series resistance, then the electric field distribution at the limit of avalanche breakdown will look as shown in FIG. 3. The electric field at the right border of the drift region is now ⅓ of the maximum electric field Emax which is reached at the pn junction. The buffer layer has ten times higher doping concentration than the drift region and the ten times higher space charge concentration causes the gradient of the electric field to increase by a factor of ten compared to the drift region. The buffer layer in the silicon carbide diode is designed to reduce the electric field to zero before it reaches the highly doped n+ substrate and FIG. 3 shows that the buffer layer thickness (Wn) only has to exceed 5% of the thickness of the drift region (Wn−) to reduce the electric field to zero before it reaches the highly doped n+ substrate. If the doping concentration of the buffer layer (N) is higher than the doping concentration of the drift region (N−) by more than one order of magnitude (as is typical) then the buffer layer can be made even thinner without a high electric field reaching the n+ substrate.
Publication EP 1693896 A1 shows another use of buffer layers, which is to prevent free carriers in a silicon carbide device from reaching and recombining in the heavily doped substrate where they can cause formation of stacking faults and a thereby associated device degradation. This type of buffer layer can be made thicker than conventional buffer layers. In order to work efficiently, the doping concentration in the buffer layer must then, however, be considerably higher than the doping concentration of conventional buffer layers.